libnile
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flash.h
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1/*
2 * Copyright (c) 2023, 2024 Adrian "asie" Siekierka
3 *
4 * This software is provided 'as-is', without any express or implied
5 * warranty. In no event will the authors be held liable for any damages
6 * arising from the use of this software.
7 *
8 * Permission is granted to anyone to use this software for any purpose,
9 * including commercial applications, and to alter it and redistribute it
10 * freely, subject to the following restrictions:
11 *
12 * 1. The origin of this software must not be misrepresented; you must not
13 * claim that you wrote the original software. If you use this software
14 * in a product, an acknowledgment in the product documentation would be
15 * appreciated but is not required.
16 *
17 * 2. Altered source versions must be plainly marked as such, and must not be
18 * misrepresented as being the original software.
19 *
20 * 3. This notice may not be removed or altered from any source distribution.
21 */
22
23#ifndef NILE_FLASH_H_
24#define NILE_FLASH_H_
25
26#include <wonderful.h>
27#include "hardware.h"
28
29#define NILE_FLASH_ID_W25Q16JV_IQ 0xEF4015
30#define NILE_FLASH_ID_W25Q16JV_IM 0xEF7015
31
32#define NILE_FLASH_SR1_BUSY (1 << 0)
33#define NILE_FLASH_SR1_WEL (1 << 1)
34#define NILE_FLASH_SR1_BP0 (1 << 2)
35#define NILE_FLASH_SR1_BP1 (1 << 3)
36#define NILE_FLASH_SR1_BP2 (1 << 4)
37#define NILE_FLASH_SR1_TB (1 << 5)
38#define NILE_FLASH_SR1_SEC (1 << 6)
39#define NILE_FLASH_SR1_CMP (1 << 7)
40
41#define NILE_FLASH_SR2_SRL (1 << 0)
42#define NILE_FLASH_SR2_LB1 (1 << 3)
43#define NILE_FLASH_SR2_LB2 (1 << 4)
44#define NILE_FLASH_SR2_LB3 (1 << 5)
45#define NILE_FLASH_SR2_CMP (1 << 6)
46#define NILE_FLASH_SR2_SUS (1 << 7)
47
48#define NILE_FLASH_SR3_WPS (1 << 2)
49#define NILE_FLASH_SR3_DRV_100 (0)
50#define NILE_FLASH_SR3_DRV_75 (1 << 5)
51#define NILE_FLASH_SR3_DRV_50 (2 << 5)
52#define NILE_FLASH_SR3_DRV_25 (3 << 5)
53#define NILE_FLASH_SR3_DRV_MASK (3 << 5)
54
55#define NILE_FLASH_CMD_WRSR1 0x01
56#define NILE_FLASH_CMD_WRITE 0x02
57#define NILE_FLASH_CMD_READ 0x03
58#define NILE_FLASH_CMD_WRDI 0x04
59#define NILE_FLASH_CMD_RDSR1 0x05
60#define NILE_FLASH_CMD_WREN 0x06
61#define NILE_FLASH_CMD_WRSR3 0x11
62#define NILE_FLASH_CMD_RDSR3 0x15
63#define NILE_FLASH_CMD_ERASE_4K 0x20
64#define NILE_FLASH_CMD_WRSR2 0x31
65#define NILE_FLASH_CMD_RDSR2 0x35
66#define NILE_FLASH_CMD_BLOCK_LOCK 0x36
67#define NILE_FLASH_CMD_BLOCK_UNLOCK 0x39
68#define NILE_FLASH_CMD_BLOCK_RDLOCK 0x3D
69#define NILE_FLASH_CMD_SEC_WRITE 0x42
70#define NILE_FLASH_CMD_SEC_ERASE 0x44
71#define NILE_FLASH_CMD_SEC_READ 0x48
72#define NILE_FLASH_CMD_RDUUID 0x4B
73#define NILE_FLASH_CMD_ERASE_32K 0x52
74#define NILE_FLASH_CMD_RDSFPD 0x5A
75#define NILE_FLASH_CMD_RESET_EN 0x66
76#define NILE_FLASH_CMD_SUSPEND 0x75
77#define NILE_FLASH_CMD_RESUME 0x7A
78#define NILE_FLASH_CMD_LOCK 0x7E
79#define NILE_FLASH_CMD_MFR_ID 0x90
80#define NILE_FLASH_CMD_UNLOCK 0x98
81#define NILE_FLASH_CMD_RESET 0x99
82#define NILE_FLASH_CMD_RDID 0x9F
83#define NILE_FLASH_CMD_WAKE_ID 0xAB
84#define NILE_FLASH_CMD_SLEEP 0xB9
85#define NILE_FLASH_CMD_ERASE_ALL 0xC7
86#define NILE_FLASH_CMD_ERASE_64K 0xD8
87
88#ifndef __ASSEMBLER__
89#include <stdbool.h>
90#include <stdint.h>
91
95static inline bool nile_flash_write_unlock_global(void) {
96 bool __nile_flash_cmd(uint8_t cmd);
97 return __nile_flash_cmd(NILE_FLASH_CMD_WREN) && __nile_flash_cmd(NILE_FLASH_CMD_UNLOCK);
98}
99
103static inline bool nile_flash_write_enable(void) {
104 bool __nile_flash_cmd(uint8_t cmd);
105 return __nile_flash_cmd(NILE_FLASH_CMD_WREN);
106}
107
111static inline bool nile_flash_write_disable(void) {
112 bool __nile_flash_cmd(uint8_t cmd);
113 return __nile_flash_cmd(NILE_FLASH_CMD_WRDI);
114}
115
119static inline bool nile_flash_wake(void) {
120 bool __nile_flash_cmd(uint8_t cmd);
121 return __nile_flash_cmd(NILE_FLASH_CMD_WAKE_ID);
122}
123
127static inline bool nile_flash_sleep(void) {
128 bool __nile_flash_cmd(uint8_t cmd);
129 return __nile_flash_cmd(NILE_FLASH_CMD_SLEEP);
130}
131
135bool nile_flash_read_uuid(uint8_t *buffer);
136
140uint32_t nile_flash_read_id(void);
141
149bool nile_flash_read(void __far* buffer, uint32_t address, uint16_t size);
150
158bool nile_flash_write_page(const void __far* buffer, uint32_t address, uint16_t size);
159
168static inline bool nile_flash_erase_part(uint8_t type, uint32_t address) {
169 bool __nile_flash_erase_address(uint32_t address);
170 return __nile_flash_erase_address((((uint32_t) type) << 24) | address);
171}
172
173static inline uint8_t nile_flash_read_sr1(void) {
174 uint8_t __nile_flash_read_sr(uint8_t value);
175 return __nile_flash_read_sr(NILE_FLASH_CMD_RDSR1);
176}
177
178static inline uint8_t nile_flash_read_sr2(void) {
179 uint8_t __nile_flash_read_sr(uint8_t value);
180 return __nile_flash_read_sr(NILE_FLASH_CMD_RDSR2);
181}
182
183static inline uint8_t nile_flash_read_sr3(void) {
184 uint8_t __nile_flash_read_sr(uint8_t value);
185 return __nile_flash_read_sr(NILE_FLASH_CMD_RDSR3);
186}
187
188static inline bool nile_flash_write_sr1(uint8_t value) {
189 bool __nile_flash_write_sr(uint16_t value);
190 return __nile_flash_write_sr(NILE_FLASH_CMD_WRSR1 | (value << 8));
191}
192
193static inline bool nile_flash_write_sr2(uint8_t value) {
194 bool __nile_flash_write_sr(uint16_t value);
195 return __nile_flash_write_sr(NILE_FLASH_CMD_WRSR2 | (value << 8));
196}
197
198static inline bool nile_flash_write_sr3(uint8_t value) {
199 bool __nile_flash_write_sr(uint16_t value);
200 return __nile_flash_write_sr(NILE_FLASH_CMD_WRSR3 | (value << 8));
201}
202
207
208#endif /* __ASSEMBLER__ */
209
210#endif /* NILE_FLASH_H_ */
static bool nile_flash_write_disable(void)
Disable SPI flash writing.
Definition flash.h:111
#define NILE_FLASH_CMD_WRSR2
Write Status Register 2.
Definition flash.h:64
static bool nile_flash_write_enable(void)
Enable SPI flash writing.
Definition flash.h:103
static uint8_t nile_flash_read_sr3(void)
Definition flash.h:183
static uint8_t nile_flash_read_sr1(void)
Definition flash.h:173
static bool nile_flash_sleep(void)
Put SPI flash to sleep.
Definition flash.h:127
bool nile_flash_wait_ready(void)
Wait until SPI flash is ready.
#define NILE_FLASH_CMD_WREN
Write Enable.
Definition flash.h:60
static bool nile_flash_write_sr2(uint8_t value)
Definition flash.h:193
#define NILE_FLASH_CMD_WAKE_ID
Release Power-down / Device ID.
Definition flash.h:83
bool nile_flash_write_page(const void __far *buffer, uint32_t address, uint16_t size)
Write page to SPI flash.
#define NILE_FLASH_CMD_UNLOCK
Global unlock.
Definition flash.h:80
#define NILE_FLASH_CMD_WRSR1
Write Status Register 1.
Definition flash.h:55
#define NILE_FLASH_CMD_SLEEP
Power-down.
Definition flash.h:84
#define NILE_FLASH_CMD_WRDI
Write Disable.
Definition flash.h:58
static bool nile_flash_erase_part(uint8_t type, uint32_t address)
Erase area from SPI flash.
Definition flash.h:168
static uint8_t nile_flash_read_sr2(void)
Definition flash.h:178
uint32_t nile_flash_read_id(void)
Read JEDEC ID from SPI flash.
static bool nile_flash_write_sr3(uint8_t value)
Definition flash.h:198
#define NILE_FLASH_CMD_RDSR2
Read Status Register 2.
Definition flash.h:65
static bool nile_flash_write_sr1(uint8_t value)
Definition flash.h:188
#define NILE_FLASH_CMD_RDSR1
Read Status Register 1.
Definition flash.h:59
static bool nile_flash_wake(void)
Wake up SPI flash.
Definition flash.h:119
static bool nile_flash_write_unlock_global(void)
Unlock global SPI flash writing.
Definition flash.h:95
#define NILE_FLASH_CMD_WRSR3
Write Status Register 3.
Definition flash.h:61
bool nile_flash_read(void __far *buffer, uint32_t address, uint16_t size)
Read data from SPI flash.
bool nile_flash_read_uuid(uint8_t *buffer)
Read device UUID (8 bytes) from SPI flash.
#define NILE_FLASH_CMD_RDSR3
Read Status Register 3.
Definition flash.h:62